Office Of Dg ace
Maharashtra | Pune City |
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Time left to bid
15
Days6
Hours14
MinutesTender Roadmap
Publish Date
17 Dec 2024
Tender is published for seller Participation.
Bid Submission End Date
07 Jan 2025
Last day to participate Tender on GeM platform.
Evaluation Date
07 Jan 2025
Technical committe will evaluate Bid and Open Results.
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Department Of Defence Research Development | |||||||||||||||||||||||||||||
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Logic Circuit Null Gate Design 01 as per Drawing HEMRL/EMR/LCNG/D1/01 Logic Circuit Null Gate Design 02 as per Drawing HEMRL/EMR/LCNG/D2/02 Logic Circuit Null Gate Design 03 as per Drawing HEMRL/EMR/LCNG/D3/03 Logic Circuit Null Gate Design 04 as per Drawing HEMRL/EMR/LCNG/D4/04 Logic Circuit Top Plate 01 as per Drawing HEMRL/EMR/LCNG/D5/05 Logic Circuit Crocessover 01 as per Drawing HEMRL/EMR/LCCO/D1/06 Logic Circuit Crocessover 02 as per Drawing HEMRL/EMR/LCCO/D2/07 Logic Circuit Top Plate 02 as per Drawing HEMRL/EMR/LCCO/D3/08 GeMARPTS / Searched Strings used in GeMARPTS Logic Circuit Top Plate 02 GeMARPTS / Searched Result generated in GeMARPTS Disposable Cautery Plate / Pad V3 Deep well plates Chapati Plate with Puffer V2 Recirculating chiller / Relevant Categories selected for notification Top Insulation Plate BHEL MSE Exemption for Years of Experience and Turnover/ No Startup Exemption for Years of Experience and Turnover/ No | |||||||||||||||||||||||||||||
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PUNE CITY | |||||||||||||||||||||||||||||
Work Description | |||||||||||||||||||||||||||||
300; Logic Circuit Null Gate Design 01 as per Drawing HEMRL/EMR/LCNG/D1/01 Logic Circuit Null Gate Design 02 as per Drawing HEMRL/EMR/LCNG/D2/02 Logic Circuit Null Gate Design 03 as per Drawing HEMRL/EMR/LCNG/D3/03 Logic Circuit Null Gate Design 04 as per Drawing HEMRL/EMR/LCNG/D4/04 Logic Circuit Top Plate 01 as per Drawing HEMRL/EMR/LCNG/D5/05 Logic Circuit Crocessover 01 as per Drawing HEMRL/EMR/LCCO/D1/06 Logic Circuit Crocessover 02 as per Drawing HEMRL/EMR/LCCO/D2/07 Logic Circuit Top Plate 02 as per Drawing HEMRL/EMR/LCCO/D3/08 GeMARPTS / Searched Strings used in GeMARPTS Logic Circuit Top Plate 02 GeMARPTS / Searched Result generated in GeMARPTS Disposable Cautery Plate / Pad V3 Deep well plates Chapati Plate with Puffer V2 Recirculating chiller / Relevant Categories selected for notification Top Insulation Plate BHEL MSE Exemption for Years of Experience and Turnover/ No Startup Exemption for Years of Experience and Turnover/ No
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Eligibility | |||||||||||||||||||||||||||||
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